Simulators have been in widespread use which simulate the characteristics of transistors by evaluating model equations, many of which assume that there extend a single resistance region below the gate section of the transistor.
An example of such a model equation is:Vd/Id=Leff/[Weff·μ·Cox·(Vg−Vt−Vd/2)]+R  (1)where Vd is the source-to-drain voltage, Id the source-to-drain current, Vg the gate-to-source voltage, R the resistance value of a part of source and drain regions which are not under a gate electrode, Weff the effective gate width of the transistor, Cox the capacitance density of the transistor's gate oxide film, μ the mobility of moving carriers, and Leff the effective channel length.
This model equation assumes that there exist a single resistance region below the gate section of the transistor, as is the case with the transistor 121 shown in FIG. 6. The equation is thus capable of simulating the characteristics of the transistor (first transistor) to high accuracy. However, with the equation, one cannot readily carry out a accurate characteristics simulation for a transistor (second transistor) in which there exist multiple impurity concentration regions below the gate section. An example of such a transistor is shown in FIG. 2. Designated by 101, the transistor includes impurity regions below its gate section at lower concentrations than in the source and drain sections. No such impurity regions are included in the first transistor.
FIGS. 24, 25 represent results of extraction of a transconductance gm using model equation (1) for the first and second transistors respectively. In each case, the extraction was conducted on samples varying from L1 to L5 in gate length at a gate voltage Vg, by extracting an R value from the characteristics of the individual sample using equation (1) and then calculating ideal transistor characteristics under no influence of the R using equation (1). In the figures, the transconductances gm are normalized by their maximum value gmax. A comparison of the figures clearly demonstrates that the normalized gm characteristics are substantially identical between different gate lengths similarly to actual characteristics in FIG. 24 representing the extraction results for the first transistor, whereas in FIG. 25 representing the extraction results for the second transistor, the normalized gm characteristics vary with gate length unlike actual characteristics.
To simulate the characteristics of the second transistor to high accuracy using model equation (1), for example, an analytical equation reflecting structure dependence may be expediently added to the original model equation assuming a moving carrier mobility of μ. The resultant model equation simulates a different moving carrier mobility μ from the first transistor. This alternative equation however is more complicated.
In addition, with alternative model equations simulating a different moving carrier mobility μ from the first transistor, parameter extraction is difficult and simulatable gate length ranges are narrower, because the model equations disregards the physical fact that the first and second transistors have the same moving carrier mobility, except in the impurity concentration regions found in the second transistor, but not in the first transistor.
Japanese patent 2699844 (registered Sep. 26, 1997; see equations (8), (19), and (20)) discloses a simulator simulating the characteristics of a transistor by equation (2):Vd/Id=L/[Weff·μ·Cox·(Vg−Vt)]−l0/[Weff·μ·Cox·(Vg−Vt)]+R  (2)The equation aims a accurate simulation of the characteristics of a transistor having impurity regions below its gate section at lower concentrations than in the source and drain sections. In equation (2), L is the gate length. Also, l0 is an overlap length of a gate diffusion layer. With model parameters LO, LA, LB and an effective gate voltage Vge, equations (3), (4) hold:l0=LO+LA·(1−Vge/LB)2 when Vge<LB  (3)l0=LO when Vge≧LB  (4)
However, in the above-described conventional art, the resistance in a region where the actual resistance value varies with gate voltage is adjusted depending on the length of the region. The approach will result in departure from the physical model when it involves an increased number of parameters being determined empirically. Thus, the approach poorly matches capacitance models based on the behavior of surface charge in the channel section and renders it difficult to improve the fitting accuracy of simulation where evaluation through actual measurement is difficult, as in subthreshold regions.